Kai Weber received his Dipl.-Ing.(BA) in information technology from the University of Collaborative Education, Stuttgart, and a bachelor degree in computer science from the Open University, UK, in 2003. He joined IBM Research and Development in 2003, working on formal verification of floating-point units and leading the floating-point unit verification teams for IBM’s POWER6 and z10 processors. Mr. Weber was the processor verification team leader for the IBM zEnterprise 196 mainframe and continues in this role for future generations of IBM System z processors. In addition Mr. Weber is participating in two joint research projects with the University of Tuebingen and Saarland University eval- uating hybrid systems and business analytic workloads.